From: James Clarke <jrtc27@xxxxxxxxxx> Date: Wed, 26 Oct 2016 17:58:16 +0100 >> On 26 Oct 2016, at 16:54, David Miller <davem@xxxxxxxxxxxxx> wrote: >> >> From: James Clarke <jrtc27@xxxxxxxxxx> >> Date: Wed, 26 Oct 2016 09:28:05 +0100 >> >>> Any progress on TLB flushing? >> >> I was half-way through an implementation when I noticed that >> hypervisor TLB flush handler relative branch bug I posted the >> fix for last night. > > Yep, I saw that. Looks like you forgot to update the comment on > __hypervisor_flush_tlb_pending; it still says 16 insns rather than 27. Fixed, thanks. And now I noticed that the cross-call hypervisor tlb flush assembler has the bug and needs to be fixed too... >> I'll keep plugging away at it today. > > Great; let me know if you need a guinea pig, as itʼs pretty easy for me to > reproduce. Will do, what kind of cpus do you have? ?τθΊ{.nΗ+?·????+%?Λ?±ιέΆ??w?Ί{.nΗ+?·¬??ά?)ξΗψ§Ά?ʽά¨}©?²Ζ zΪ&j:+v?¨ώψ―ω?w?ώ?ΰ2?ή?¨θΪ&ʼ)ίʽ«aΆΪ??ϋΰzΏδzΉή?ϊ+?ω???έʼj??wθώf