On (01/13/15 16:58), David Miller wrote: > From: Sowmini Varadhan <sowmini.varadhan@xxxxxxxxxx> > Date: Tue, 13 Jan 2015 10:45:30 -0500 > > > On (01/13/15 01:08), Tantilov, Emil S wrote: > >> Relaxed ordering was disabled due to an issue with some chipsets. There > >> is a comment to that effect when enabling relaxed ordering for reads in > >> ixgbe_update_tx_dca(). This was done back in 2011, so I'm still trying > >> to dig through the details. > > > > It would be helpful to know exactly which chipsets, so that in > > those cases, we can set the ->enable_relaxed_ordering in my patch > > to null (or make this setting specific to CONFIG_SPARC?) > > I think they are talking about "system chipsets", ie. relaxed ordering > doesn't work reliably on this or that AMD/Intel/whatever system > chipset. If that's what they have in mind (as opposed to some specific set of ethernet controller) then we can #ifdef CONFIG_SPARC the ->enable_relaxed_ordering initialization? --Sowmini -- To unsubscribe from this list: send the line "unsubscribe sparclinux" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
