Re: [PATCH 2/2] sparc32: use flushi when run-time patching in per_cpu_patch

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From: Sam Ravnborg <sam@xxxxxxxxxxxx>
Date: Sun, 20 May 2012 17:33:34 +0200

>>From ddbad389ff8ab3b0c3c2a04fb31c3bffdc8e578f Mon Sep 17 00:00:00 2001
> From: Sam Ravnborg <sam@xxxxxxxxxxxx>
> Date: Sun, 20 May 2012 17:27:53 +0200
> Subject: [PATCH 2/2] sparc32: use flushi when run-time patching in per_cpu_patch
> 
> Davis S. Miller wrote:
> "
> The way we do that now is overkill.  We only needed to use the MMU
> cache ops when we had sun4c around because sun4c lacked support for
> the "flush" instruction.
> 
> But all sun4m and later chips have it so we can use it
> unconditionally.
> 
> So in the per_cpu_patch() code, get rid of the cache ops invocation,
> and instead execute a "flush %reg" after each of the instruction patch
> assignments, where %reg is set to the address of the instruction that
> was stored into.
> 
> Perhaps take the flushi() definition from asm/cacheflush_64.h and
> place it into asm/cacheflush.h, then you can simply use that.
> "
> 
> Implemented as per suggestion.
> Moved run-time patching before we call paging_init(),
> so helper methods in paging_init() may utilise run-time patching too.
> 
> Signed-off-by: Sam Ravnborg <sam@xxxxxxxxxxxx>

Looks perfect, applied, thanks.
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