From: David Miller <davem@xxxxxxxxxxxxx> Date: Wed, 22 Apr 2009 23:11:03 -0700 (PDT) > From: Vince Weaver <vince@xxxxxxxxxx> > Date: Wed, 22 Apr 2009 15:40:42 -0400 (EDT) > >> Add proper Niagara1 perfcounter accesses. >> >> When trying to track down the hang-on-boot NMI problem on my >> T1 system, I noticed that Niagara2 performance counter accesses >> were being done, even though I only have a Niagara1 system. >> This means "undefined" bits were being written to in the >> performance counter register. Vince can you describe this problem? I'm trying to reproduce this on my t1000 with the current kernel sources and it works just fine. -- To unsubscribe from this list: send the line "unsubscribe sparclinux" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
