On Tue, 11 Apr 2006, David S. Miller wrote:
From: Frans Pop <aragorn@xxxxxxxxxx>
On Tuesday 11 April 2006 23:21, David S. Miller wrote:
You cannot write to the %tick register on some cpu variants,
it can only be written by the hypervisor.
Is it possible to test for that capability being present?
Not easily but yes, but the old code was buggy in other regards as
well. It would need to be rewritten.
Hi Dave,
From what I can tell, the only thing which removed code in second/timer.c
did is a) store the current value of the tick_cmpr register in the
sun4u_tickcmpr variable and disable interrupts from tick_cmpr by setting
bit 63 in it in sun4u_init_timer(); and b) restore the tick_cmpr value
from the variable in close_timer(). Could you explain how the removal of
this code could lead to the dramatic effect if timeout not being honoured?
tick_cmpr register is not touched elsewhere in the code, and I would
naively think that it should still work on *any* machine which has a tick
register (which Ultra10 obviously has). Any pointers to documentation
would be greatly appreciated.
Thanks,
Jurij Smakov jurij@xxxxxxxxx
Key: http://www.wooyd.org/pgpkey/ KeyID: C99E03CC
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