On Mon, Dec 06, 2021 at 01:24:03PM -0800, Randy Dunlap wrote: > > > On 12/6/21 09:53, Paul E. McKenney wrote: > > On Mon, Dec 06, 2021 at 05:36:51PM +0000, Mark Rutland wrote: > >> On Fri, Dec 03, 2021 at 07:48:08PM -0800, Randy Dunlap wrote: > >>> On 12/1/21 12:35, Thomas Gleixner wrote: > >>>> +Aside of that many architectures have to save register state, e.g. debug or > >>> > >>> state (e.g. debug) or > >>> > >>>> +cause registers before another exception of the same type can happen. A > >>> > >>> ^^^^^ cannot parse (with or without the change to the previous line) > >> > >> I think the difficulty here is with "cause register"? That' a register which > >> indicates the cause of an exception, e.g. > > Oh. I see. Thanks. > > >> * MIPS has `cause` (coprocessor 0 register 13) > >> * arm64 / AArch64 has `ESR_ELx` (Exception Syndrome Register, ELx) > >> > >> We could probably clarify this as "exception cause registers" or "exception > >> status registers", if that helps? > > > > Or to make it word-by-word unambiguous, "exception-cause registers" > > and "exception-status registers". > > Any of those works. Or even 'cause' registers. Agreed, careful use of quotation marks can also do the trick. That is the "wonderful" thing about English, so very many ways to say the same thing... Thanx, Paul
