It appears that PWM instantiated from pinctrl-intel is configured
to a wrong flow. This mini-series to fix the issue. Note, patch 1
is comprehensive documentation paragraph to explain what the difference
in the programming flow and what the SoCs are affected.
The issue had been reported privately, hence no Closes tag.
I haven't added the Tested-by, so to make sure that it (still) works
I ask Alexis to give the formal Tag here in a response to the series.
The idea is to route this via pin control tree as there are already two patches
against PWM handling in pinctrl-intel. There is no need to backport that, it's
optional, because it wasn't worked from day 1, and hence no Cc: stable@.
Cc: Alexis GUILLEMET<alexis.guillemet@xxxxxxxxxxx>
Andy Shevchenko (2):
pwm: lpss: Clarify the bypass member semantics in struct
pwm_lpss_boardinfo
pinctrl: intel: Fix wrong bypass assignment in
intel_pinctrl_probe_pwm()
drivers/pinctrl/intel/pinctrl-intel.c | 1 -
include/linux/platform_data/x86/pwm-lpss.h | 33 ++++++++++++++++++++--
2 files changed, 30 insertions(+), 4 deletions(-)
--
2.45.1.3035.g276e886db78b
