On Mon, Mar 20, 2023 at 11:20 PM David E. Box
<david.e.box@xxxxxxxxxxxxxxx> wrote:
>
> From: Rajvi Jingar <rajvi.jingar@xxxxxxxxxxxxxxx>
>
> For platforms with Alder Lake PCH (Alder Lake S and Raptor Lake S) the
> slp_s0_residency attribute has been reporting the wrong value. Unlike other
> platforms, ADL PCH does not have a counter for the time that the SLP_S0
> signal was asserted. Instead, firmware uses the aggregate of the Low Power
> Mode (LPM) substate counters as the S0ix value. Since the LPM counters run
> at a different frequency, this lead to misreporting of the S0ix time.
>
> Add a check for Alder Lake PCH and adjust the frequency accordingly when
> display slp_s0_residency.
OK!
But one nit-pick below.
Reviewed-by: Andy Shevchenko <andy.shevchenko@xxxxxxxxx>
> Fixes: bbab31101f44 ("platform/x86/intel: pmc/core: Add Alderlake support to pmc core driver")
> Signed-off-by: Rajvi Jingar <rajvi.jingar@xxxxxxxxxxxxxxx>
> Signed-off-by: David E. Box <david.e.box@xxxxxxxxxxxxxxx>
> ---
> drivers/platform/x86/intel/pmc/core.c | 13 ++++++++++++-
> 1 file changed, 12 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/platform/x86/intel/pmc/core.c b/drivers/platform/x86/intel/pmc/core.c
> index e489d2175e42..61ca7c37fb02 100644
> --- a/drivers/platform/x86/intel/pmc/core.c
> +++ b/drivers/platform/x86/intel/pmc/core.c
> @@ -66,7 +66,18 @@ static inline void pmc_core_reg_write(struct pmc_dev *pmcdev, int reg_offset,
>
> static inline u64 pmc_core_adjust_slp_s0_step(struct pmc_dev *pmcdev, u32 value)
> {
> - return (u64)value * pmcdev->map->slp_s0_res_counter_step;
> + /*
> + * ADL PCH does not have the SLP_S0 counter and LPM Residency counters are
> + * used as a workaround which uses 30.5 usec tick. All other client
microsecond or us or µs (I prefer the latter).
> + * programs have the legacy SLP_S0 residency counter that is using the 122
> + * usec tick.
microsecond or us or µs (I prefer the latter).
> + */
> + const int lpm_adj_x2 = pmcdev->map->lpm_res_counter_step_x2;
> +
> + if (pmcdev->map == &adl_reg_map)
> + return (u64)value * GET_X2_COUNTER((u64)lpm_adj_x2);
> + else
Redundant 'else'.
> + return (u64)value * pmcdev->map->slp_s0_res_counter_step;
> }
>
> static int set_etr3(struct pmc_dev *pmcdev)
>
> base-commit: 02c464b73645404654359ad21f368a13735e2850
> --
> 2.34.1
>
--
With Best Regards,
Andy Shevchenko
