Re: [PATCH 4/5] platform/x86/intel/ifs: Implement Array BIST test

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On Wed, Feb 01, 2023 at 07:19:15PM +0100, Greg KH wrote:
> It shouldn't be that hard, lots of people use them today.
> 
> Try and see!


Extract from the first of our in-field-scan tests:

	while (activate.start <= activate.stop) {

		... trigger scan ...

		if (status.chunk_num == activate.start) {
			... check for too many retries on same chunk ...
		} else {
			activate.start = status.chunk_num;
		}
	}

using <linux/bitfield.h> becomes:

	while (FIELD_GET(GENMASK(7, 0), activate) <= FIELD_GET(GENMASK(15, 8), activate) {


		if (FIELD_GET(GENMASK(7, 0), status) == FIELD_GET(GENMASK(7, 0), activate) {
			...
		} else {
			activate &= ~GENMASK(7, 0);
			activate |= FIELD_PREP(GENMASK(7, 0), FIELD_GET(GENMASK(7, 0), status));
		}
	}

While I can make that more legible with some helper #defines for the
fields, it becomes more difficult to write, and no easier to read (since
I then have to chase down what the macros are doing).

If this were in some performance critical path, I might worry about
whether the generated code was good enough. But this code path isn't
remotely critical to anyone. The test takes up to 200 usec, so saving
a handful of cycles in the surrounding code will be in the noise.

-Tony



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