Re: [PATCH 1/2] platform/x86: Add the VLV ISP PCI ID to atomisp2_pm

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Hi Ville,

On 29-11-18 18:44, Ville Syrjala wrote:
From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>

If the ISP is exposed as a PCI device VLV machines need the
same treatment as CHV machines to power gate the ISP. Otherwise
s0ix will not work.

Cc: Hans de Goede <hdegoede@xxxxxxxxxx>
Cc: Alan Cox <alan@xxxxxxxxxxxxxxx>
Cc: Andy Shevchenko <andriy.shevchenko@xxxxxxxxxxxxxxx>
Cc: Darren Hart <dvhart@xxxxxxxxxxxxx>
Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>

Thank you for the patches, both look good to me:

Reviewed-by: Hans de Goede <hdegoede@xxxxxxxxxx>

I've added both patches and the "drm/i915: Assert that VED
and ISP are power gated" patch to me personal tree, which I
regularly test on various BYT/CHT devices.  If I notice
anything wrt these patches I will let you know.

Regards,

Hans




---
  drivers/platform/x86/intel_atomisp2_pm.c | 1 +
  1 file changed, 1 insertion(+)

diff --git a/drivers/platform/x86/intel_atomisp2_pm.c b/drivers/platform/x86/intel_atomisp2_pm.c
index 9371603a0ac9..4a2ec5eeb6d8 100644
--- a/drivers/platform/x86/intel_atomisp2_pm.c
+++ b/drivers/platform/x86/intel_atomisp2_pm.c
@@ -99,6 +99,7 @@ static UNIVERSAL_DEV_PM_OPS(isp_pm_ops, isp_pci_suspend,
  			    isp_pci_resume, NULL);
static const struct pci_device_id isp_id_table[] = {
+	{ PCI_VDEVICE(INTEL, 0x0f38), },
  	{ PCI_VDEVICE(INTEL, 0x22b8), },
  	{ 0, }
  };




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