On Fri, Jan 19, 2018 at 10:58 AM, Rajneesh Bhardwaj <rajneesh.bhardwaj@xxxxxxxxx> wrote: > Add CPUID of Cannonlake (CNL) processors to Intel family list. > > Cc: Dave Hansen <dave.hansen@xxxxxxxxxxxxxxx> > Cc: Thomas Gleixner <tglx@xxxxxxxxxxxxx> > cc: Ingo Molnar <mingo@xxxxxxxxxx> > Cc: "H. Peter Anvin" <hpa@xxxxxxxxx> > Cc: x86@xxxxxxxxxx Thomas, can you Ack this patch? > Suggested-by: Tony Luck <tony.luck@xxxxxxxxx> > Signed-off-by: Megha Dey <megha.dey@xxxxxxxxxxxxxxx> > Signed-off-by: Rajneesh Bhardwaj <rajneesh.bhardwaj@xxxxxxxxx> > --- > arch/x86/include/asm/intel-family.h | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/arch/x86/include/asm/intel-family.h b/arch/x86/include/asm/intel-family.h > index 35a6bc4da8ad..cf090e584202 100644 > --- a/arch/x86/include/asm/intel-family.h > +++ b/arch/x86/include/asm/intel-family.h > @@ -10,6 +10,10 @@ > * > * Things ending in "2" are usually because we have no better > * name for them. There's no processor called "SILVERMONT2". > + * > + * While adding a new CPUID for a new microarchitecture, add a new > + * group to keep logically sorted out in chronological order. Within > + * that group keep the CPUID for the variants sorted by model number. > */ > > #define INTEL_FAM6_CORE_YONAH 0x0E > @@ -49,6 +53,8 @@ > #define INTEL_FAM6_KABYLAKE_MOBILE 0x8E > #define INTEL_FAM6_KABYLAKE_DESKTOP 0x9E > > +#define INTEL_FAM6_CANNONLAKE_MOBILE 0x66 > + > /* "Small Core" Processors (Atom) */ > > #define INTEL_FAM6_ATOM_PINEVIEW 0x1C > -- > 2.7.4 > -- With Best Regards, Andy Shevchenko
