SCU firmware nolonger supports IPC_CMD_INDIRECT_WR and IPC_CMD_INDIRECT_RD commands.
intel_scu_ipc_register_read and intel_scu_ipc_register_write api are removed fromintel_scu_ipc driver
Resending the previous patch
>From 654d48348b8812ea2f1cb2d393f53b266d59773b Mon Sep 17 00:00:00 2001
From: Sreedhara DS <sreedhara.ds@xxxxxxxxx>
Date: Sun, 30 May 2010 22:53:30 +0530
Subject: [PATCH] intel_scu_ipc_register_read/write api removed as scu firmware nolonger support these
modified: ../../../arch/x86/include/asm/intel_scu_ipc.h
modified: intel_scu_ipc.c
Signed-off-by: Sreedhara DS <sreedhara.ds@xxxxxxxxx>
---
arch/x86/include/asm/intel_scu_ipc.h | 14 ------
drivers/platform/x86/intel_scu_ipc.c | 86 ----------------------------------
2 files changed, 0 insertions(+), 100 deletions(-)
diff --git a/arch/x86/include/asm/intel_scu_ipc.h b/arch/x86/include/asm/intel_scu_ipc.h
index 4470c9a..fa2a3fd 100644
--- a/arch/x86/include/asm/intel_scu_ipc.h
+++ b/arch/x86/include/asm/intel_scu_ipc.h
@@ -28,20 +28,6 @@ int intel_scu_ipc_writev(u16 *addr, u8 *data, int len);
/* Update single register based on the mask */
int intel_scu_ipc_update_register(u16 addr, u8 data, u8 mask);
-/*
- * Indirect register read
- * Can be used when SCCB(System Controller Configuration Block) register
- * HRIM(Honor Restricted IPC Messages) is set (bit 23)
- */
-int intel_scu_ipc_register_read(u32 addr, u32 *data);
-
-/*
- * Indirect register write
- * Can be used when SCCB(System Controller Configuration Block) register
- * HRIM(Honor Restricted IPC Messages) is set (bit 23)
- */
-int intel_scu_ipc_register_write(u32 addr, u32 data);
-
/* Issue commands to the SCU with or without data */
int intel_scu_ipc_simple_command(int cmd, int sub);
int intel_scu_ipc_command(int cmd, int sub, u32 *in, int inlen,
diff --git a/drivers/platform/x86/intel_scu_ipc.c b/drivers/platform/x86/intel_scu_ipc.c
index 30e5231..debc93e 100644
--- a/drivers/platform/x86/intel_scu_ipc.c
+++ b/drivers/platform/x86/intel_scu_ipc.c
@@ -38,10 +38,6 @@
#define IPC_CMD_PCNTRL_R 1 /* Register read */
#define IPC_CMD_PCNTRL_M 2 /* Register read-modify-write */
-/* Miscelaneous Command ids */
-#define IPC_CMD_INDIRECT_RD 2 /* 32bit indirect read */
-#define IPC_CMD_INDIRECT_WR 5 /* 32bit indirect write */
-
/*
* IPC register summary
*
@@ -116,24 +112,6 @@ static inline void ipc_data_writel(u32 data, u32 offset) /* Write ipc data */
}
/*
- * IPC destination Pointer (Write Only):
- * Use content as pointer for destination write
- */
-static inline void ipc_write_dptr(u32 data) /* Write dptr data */
-{
- writel(data, ipcdev.ipc_base + 0x0C);
-}
-
-/*
- * IPC Source Pointer (Write Only):
- * Use content as pointer for read location
-*/
-static inline void ipc_write_sptr(u32 data) /* Write dptr data */
-{
- writel(data, ipcdev.ipc_base + 0x08);
-}
-
-/*
* Status Register (Read Only):
* Driver will read this register to get the ready/busy status of the IPC
* block and error status of the IPC command that was just processed by SCU
@@ -414,70 +392,6 @@ int intel_scu_ipc_update_register(u16 addr, u8 bits, u8 mask)
EXPORT_SYMBOL(intel_scu_ipc_update_register);
/**
- * intel_scu_ipc_register_read - 32bit indirect read
- * @addr: register address
- * @value: 32bit value return
- *
- * Performs IA 32 bit indirect read, returns 0 on success, or an
- * error code.
- *
- * Can be used when SCCB(System Controller Configuration Block) register
- * HRIM(Honor Restricted IPC Messages) is set (bit 23)
- *
- * This function may sleep. Locking for SCU accesses is handled for
- * the caller.
- */
-int intel_scu_ipc_register_read(u32 addr, u32 *value)
-{
- u32 err = 0;
-
- mutex_lock(&ipclock);
- if (ipcdev.pdev == NULL) {
- mutex_unlock(&ipclock);
- return -ENODEV;
- }
- ipc_write_sptr(addr);
- ipc_command(4 << 16 | IPC_CMD_INDIRECT_RD);
- err = busy_loop();
- *value = ipc_data_readl(0);
- mutex_unlock(&ipclock);
- return err;
-}
-EXPORT_SYMBOL(intel_scu_ipc_register_read);
-
-/**
- * intel_scu_ipc_register_write - 32bit indirect write
- * @addr: register address
- * @value: 32bit value to write
- *
- * Performs IA 32 bit indirect write, returns 0 on success, or an
- * error code.
- *
- * Can be used when SCCB(System Controller Configuration Block) register
- * HRIM(Honor Restricted IPC Messages) is set (bit 23)
- *
- * This function may sleep. Locking for SCU accesses is handled for
- * the caller.
- */
-int intel_scu_ipc_register_write(u32 addr, u32 value)
-{
- u32 err = 0;
-
- mutex_lock(&ipclock);
- if (ipcdev.pdev == NULL) {
- mutex_unlock(&ipclock);
- return -ENODEV;
- }
- ipc_write_dptr(addr);
- ipc_data_writel(value, 0);
- ipc_command(4 << 16 | IPC_CMD_INDIRECT_WR);
- err = busy_loop();
- mutex_unlock(&ipclock);
- return err;
-}
-EXPORT_SYMBOL(intel_scu_ipc_register_write);
-
-/**
* intel_scu_ipc_simple_command - send a simple command
* @cmd: command
* @sub: sub type
--
1.5.4.5
Attachment:
0004-intel_scu_ipc_register_read-write-api-removed-as-scu.patch
Description: 0004-intel_scu_ipc_register_read-write-api-removed-as-scu.patch
