Hi, i'am working on a Blackfin port of the pjsip stack using the VDK from Analog Devices. I want to use the pjsip library in a sigle thread. So I didn't port all the threading stuff in pjlib. Only the needed functions are implemented. This works quite well besides the function "pjsua_set_null_snd_dev()" always creates the master port with the ASYNC option enabled. This does not work in a single threaded env. I've changed this to NO_ASYNC but then I have to poll the internal media clock from my main loop but the clock is not exposed to be accessable from the Apllication. So we need either a function like master_port_poll() or this needs to be integrated into the "pjsua_handle_events()" function. Regards Bjoern ----- #- Bj?rn Riemer #- FOKUS - Fraunhofer Institute for Open Communication Systems #- -Sensor Applications and Networks - #- Kaiserin-Augusta-Allee 31 #- 10589 Berlin, Germany #- phone: +49 30 3463-7747 #- fax: +49 30 3463-8000 #- email: bjoern.riemer at fokus.fraunhofer.de <mailto:bjoern.riemer at fokus.fraunhofer.de> #- http://www.fokus.fraunhofer.de <http://www.fokus.fraunhofer.de> -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.pjsip.org/pipermail/pjsip_lists.pjsip.org/attachments/20100416/203f675b/attachment.html>
