On Tue, Dec 07, 2021 at 10:07:58AM +0800, Zhouyi Zhou wrote: > Hi Paul, > > During the study of RCU, I encountered confusion about how X86's > irq_disable affects Linux IPI delivery. So I spent a week trying to > find out the fundamental mechanism by debugging the qemu virtual > machine. I think my experience may help others, and I guess the > perfbook mailing list is the best place to share my experience. Please > correct me if it is improper. No objections here. > I learn how Linux IPI is blocked by irq_disable by means of debug qemu > virtual machine: > Fig 1 (https://ibb.co/Ypv3hNm) CPU 1 sending IPI; > > Fig 2 (https://ibb.co/162sVyV) CPU 0 receive the interrupt; > > Fig 3- Fig4 (https://ibb.co/bzFkckM, https://ibb.co/TmC3rn4) but CPU 0 > has irq disabled, so the IPI will not be served at that moment; Yes, if interrupts are disabled at the receiving CPU, then the interrupt must be deferred ... > Fig 5 (https://ibb.co/k8BpBMq) CPU 0 enable irq; > > Fig 6 (https://ibb.co/zNBrMJk) now IPI got served ... as you say, until that CPU enables interrupts. This of course applies to all interrupts (other than non-maskable interrupts, which are usually called NMIs), not just to IPIs. Which is why disabling interrupts for long periods of time is not a good thing. > Thanks for your continuous encouragement ;-) You are welcome. ;-) Thanx, Paul
