Hello, Section 3.1.3 contains the following statement: "Fortunately, CPU designers have focused heavily on atomic operations, so that as of early 2014 they have greatly reduced their overhead." My experience with very recent hardware is that the *relative* cost of atomic operations has actually increased significantly. It seems that hardware designers, in their attempt to optimize performance for certain workloads, have produced hardware in which the "anomalous" conditions (atomic operations, cache misses, barriers, exceptions) incur much higher penalties than in the past. I assume that this is primarily the result of more intensive speculation and prediction. --Elad