>From 9fe9a9b3ae4323986287d291e7a516d90163b742 Mon Sep 17 00:00:00 2001
From: Akira Yokosawa <akiyks@xxxxxxxxx>
Date: Sun, 16 Apr 2017 16:11:30 +0900
Subject: [PATCH 12/14] advsync: Add another footnote implying data dependency barrier
Signed-off-by: Akira Yokosawa <akiyks@xxxxxxxxx>
---
advsync/memorybarriers.tex | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/advsync/memorybarriers.tex b/advsync/memorybarriers.tex
index 6cf25a9..2b36214 100644
--- a/advsync/memorybarriers.tex
+++ b/advsync/memorybarriers.tex
@@ -1315,7 +1315,9 @@ Q = LOAD P, D = LOAD *Q
\end{verbatim}
\end{minipage}
- and always in that order.
+ and always in that order.\footnote{Again, you can not assume
+ any ordering between~\co{P} and the value loaded via
+ the pointer when they are updated by another CPU.}
\item Overlapping loads and stores within a particular CPU will appear to be
ordered within that CPU. This means that for:
--
2.7.4
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