Hello, JeongHwan,
I'm relatively new to arm64 but there is MAIR (memory attribute indirection
register) which contains bytes holding cacheability, shareability and
protection information and the actual page table contains the 'index' for
the byte in this MAIR.
For example in linux-5.10-0 which I'm seeing now, in pgattr_change_is_safe
function (to check if changing attribute is safe?), there is this code.
/*
* Changing the memory type between Normal and Normal-Tagged is safe
* since Tagged is considered a permission attribute from the
* mismatched attribute aliases perspective.
*/
if (((old & PTE_ATTRINDX_MASK) == PTE_ATTRINDX(MT_NORMAL) ||
(old & PTE_ATTRINDX_MASK) == PTE_ATTRINDX(MT_NORMAL_TAGGED)) &&
((new & PTE_ATTRINDX_MASK) == PTE_ATTRINDX(MT_NORMAL) ||
(new & PTE_ATTRINDX_MASK) == PTE_ATTRINDX(MT_NORMAL_TAGGED)))
mask |= PTE_ATTRINDX_MASK;
it uses these index operation and actual cache policies are defined by the
MT_NORMAL (memory type normal) etc.
Hope this answers your question.
Chan
> -----Original Message-----
> From: JeongHwan Kim <frog007.kernel.kr@xxxxxxxxx>
> Sent: Wednesday, March 16, 2022 11:32 AM
> To: kernelnewbies@xxxxxxxxxxxxxxxxx
> Subject: arm64 cache policy setting
>
> Hi, everyone
>
>
> In Kernel version 5.16, ARM mmu routine, I can find "cachepolicy" kernel
> parameter to change cache policy.
>
> But, I cannot find it in ARM64 source code.
>
> Is there any method for setting cache policy in ARM64?
>
>
> Thanks in advance.
>
> J.Hwan Kim
>
>
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