On Mon, Oct 25, 2021 at 04:32:41PM +0800, Zhang Zeren wrote: > It seems that these two READ_ONCE()s can be executed in any order. But if I > run this test in a x86 machine, which has a more strict memory model, > result 1:r0=1; 1:r1=0; disappears. So the order depends on the memory model > provided by the CPU architecture? Isn't this contradicted with > memory-barrier.txt? The documentation example has two memory acceses where the second uses the value from the first one, so they are order dependent: Q = READ_ONCE(P); D = READ_ONCE(*Q); In your example there seems to be no dependency between x and y so they could be reordered? -- Valentin _______________________________________________ Kernelnewbies mailing list Kernelnewbies@xxxxxxxxxxxxxxxxx https://lists.kernelnewbies.org/mailman/listinfo/kernelnewbies
