On Tue, 26 Feb 2013 22:35:35 +0700, Mulyadi Santosa said: > let' see.... > > what if you do read and write pattern, in certain order so that it > will be invalidated by the L1/L2/L3 cache everytime? > > AFAIK, one thing for sure, reading data from sequentially and re-read > them will make end up reading cache in the 2nd operation and so on. > > I think the most certain way to do it is to read data (or write) data > bigger than total L1/L2/L3 cache. Of you could just download a copy of memtest+ and run that - I think that provides some timing info in addition to actually testing your memory.
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