Mulyadi Santosa ha scritto:
Hi
On Thu, Jul 15, 2010 at 23:42, Radhesh Kamath <rmk.list@xxxxxxxxx> wrote:
Hi list,
Apologies if this is not purely a kernel-related question:
I have a kernel module that sends me an RDTSC value to userspace, and
I need to get a UTC timestamp based on this.
As far as I understand, RDTSC gives me the clock ticks that have
elapsed since the processor was switched on (this is a 64-bit machine,
so my guess is that wraparound is not an issue).
How can I use this info to obtain a UTC timestamp?
I might be wrong, but TSC....in timing context, could only be used as
jiffies counting source and things like that...not time stamp...
What you need is probably the one that comes from CMOS....grrr I
forgot its name...let's just name it "CMOS clock"?
PS: beware of frequency stepping done in mobile processor....
Right.
From:
Intel® 64 and IA-32 Architectures Software Developer's Manual
Volume 3B: System Programming Guide (18.10):
The time-stamp counter (as implemented in the P6 family, Pentium, Pentium M,
Pentium 4, Intel Xeon, Intel Core Solo and Intel Core Duo processors and
later
processors) is a 64-bit counter that is set to 0 following a RESET of
the processor.
Following a RESET, the counter increments even when the processor is
halted by the
HLT instruction or the external STPCLK# pin. Note that the assertion of
the external
DPSLP# pin may cause the time-stamp counter to stop.
Processor families increment the time-stamp counter differently:
- For Pentium M processors (family [06H], models [09H, 0DH]); for Pentium 4
processors, Intel Xeon processors (family [0FH], models [00H, 01H, or 02H]);
and for P6 family processors: the time-stamp counter increments with every
internal processor clock cycle.
The internal processor clock cycle is determined by the current
core-clock to busclock
ratio. Intel® SpeedStep® technology transitions may also impact the
processor clock.
- For Pentium 4 processors, Intel Xeon processors (family [0FH], models
[03H and
higher]); for Intel Core Solo and Intel Core Duo processors (family
[06H], model
[0EH]); for the Intel Xeon processor 5100 series and Intel Core 2 Duo
processors
(family [06H], model [0FH]); for Intel Core 2 and Intel Xeon processors
(family
[06H], display_model [17H]); for Intel Atom processors (family [06H],
display_model [1CH]): the time-stamp counter increments at a constant rate.
That rate may be set by the maximum core-clock to bus-clock ratio of the
processor or may be set by the maximum resolved frequency at which the
processor is booted. The maximum resolved frequency may differ from the
maximum qualified frequency of the processor, see Section 18.18.5 for more
detail.
The specific processor configuration determines the behavior. Constant TSC
behavior ensures that the duration of each clock tick is uniform and
supports the
use of the TSC as a wall clock timer even if the processor core changes
frequency.
This is the architectural behavior moving forward.
Suggestion:
You can read family/model ID of you CPU from /proc/cpuinfo
regards
luca
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