Thank you! I will read through the arm specification. I thank you for your help from the bottom of my heart. ^_^ BRs, Sean -----邮件原件----- 发件人: Pei Lin [mailto:telent997@xxxxxxxxx] 发送时间: 2009年8月3日 11:05 收件人: 付新荣 抄送: microbit@xxxxxxxxxxxxxxxxxxxxxx; Kernelnewbies 主题: Re: 答复: 答复: 答复: Ecartis command results: appsub kernelnewbies FuXinRong@xxxxxxxxxxxx 4A71650B:26CF.1:xrearyarjovrf " This code is copied to 0xffff0200 so we can use branches in the * vectors, rather than ldr's. Note that this code must not * exceed 0x300 bytes. " the comment tells us using "b xx" call one function,so i think when u switch to SCV mode, if u don't save the stack,u will lost the context, so we build a stack save the parent context like the "comment" saying. " @ Save r0, lr_<exception> (parent PC) and spsr_<exception> @ (parent CPSR) " give u a link for reference. http://blog.21ic.com/user1/2537/archives/2007/41422.html http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0203i/Bgbcjggh.html ps. i am not an arm expert, all the above are my personal comprehension after reading the arm specification. BRs, Lin 2009/7/31 付新荣 <FuXinRong@xxxxxxxxxxxx>: > I have a new comprehension about the question according to your clue > > The "SP" register(R13) is a banked register, there is a corresponding physical register for each processor mode(abort fiq irq svc und ...), so in this case, when a normal interrupt exception occurs, the processor(arm core) auto enter irq mode, then the "SP"(R14) is "R14_irq", so the SP isn't the pointer of kernel stack. > > I don't know this comprehension is correct or no? > > According to this comprehension, there is also an uncertainty. > where is the "R14_irq" register initialized? > > -----邮件原件----- > 发件人: Pei Lin [mailto:telent997@xxxxxxxxx] > 发送时间: 2009年7月31日 10:29 > 收件人: 付新荣 > 抄送: microbit@xxxxxxxxxxxxxxxxxxxxxx; Kernelnewbies > 主题: Re: 答复: 答复: Ecartis command results: appsub kernelnewbies FuXinRong@xxxxxxxxxxxx 4A71650B:26CF.1:xrearyarjovrf > > see the comment " > * SP points to a minimal amount of processor-private memory, the address > * of which is copied into r0 for the mode specific abort handler. > " > i think here it build a stack for exception handling. > > BRs > Lin > > > 2009/7/31 付新荣 <FuXinRong@xxxxxxxxxxxx>: >> Thank you for your reply! >> >> I make a mistake before. >> The "sp" should decrement before storing rather than after. >> So it's should "stmdb sp, {r0, lr}" >> The "stmdb" is equivalent to "stmfd". >> So i am in accordance with u in this matter! >> >> But, >> How to explain the "stmia sp, {r0, lr}" of the micros "vector_stub" defined in file "arch/arm/kernel/entry-armv.S". >> >> Are there different comprehension in this problem? >> >> Thax! >> >> -----邮件原件----- >> 发件人: kernelnewbies-bounce@xxxxxxxxxxxx [mailto:kernelnewbies-bounce@xxxxxxxxxxxx] 代表 microbit@xxxxxxxxxxxxxxxxxxxxxx >> 发送时间: 2009年7月30日 22:01 >> 收件人: Kernelnewbies >> 主题: Re: 答复: Ecartis command results: appsub kernelnewbies FuXinRong@xxxxxxxxxxxx 4A71650B:26CF.1:xrearyarjovrf >> >> On Thu, 30 Jul 2009 18:07:18 +0800, 付新荣 <FuXinRong@xxxxxxxxxxxx> >> wrote: >>> hi,everybody. >>> I don't know why use the "stmia sp, {r0, lr}" instruction rather than >>> "stmda sp, {r0, lr}" in the macros "vector_stub" defined in file >>> "arch/arm/kernel/entry-armv.S". >>> >>> becaue the "sp" register is point to the kernel stack top. >>> The "sp" register is initialized with "init_thread_union + >> THREAD_START_SP" >>> >>> >>> Kernel stack: >>> ======================================================================= >>> Lower address higher address >>> | init_thread_union| <-------stack content--------| >>> sp >>> |<----------------------------8K bytes--------------------------->| >>> ======================================================================= >>> >>> According to the Kernel stack mechanism，I think that it should be >> "stmda >>> sp, {r0, lr}" and the SP should decrement. >>> >>> -----邮件原件----- >>> 发件人: Ecartis [mailto:ecartis@xxxxxxxxxxxx] >>> 发送时间: 2009年7月30日 17:39 >>> 收件人: 付新荣 >>> 主题: Ecartis command results: appsub kernelnewbies >>> FuXinRong@xxxxxxxxxxxx 4A71650B:26CF.1:xrearyarjovrf >>> >>> >>> List context changed to 'kernelnewbies' by following command. >>>>> appsub kernelnewbies FuXinRong@xxxxxxxxxxxx >>>>> 4A71650B:26CF.1:xrearyarjovrf >>> Subscribed. >>> >>> --- >>> Ecartis v1.0.0 - job execution complete. >>> >>> >>> -- >>> To unsubscribe from this list: send an email with >>> "unsubscribe kernelnewbies" to ecartis@xxxxxxxxxxxx >>> Please read the FAQ at http://kernelnewbies.org/FAQ >> >> Hi, >> >> I don't know the intrinsics of the kernel stack, but the stack described is >> indeed a full descending stack. >> If pushing on the stack, it's more common to use the stmfd instruction >> though. (IOW store on a full descending stack) >> I guess it depends whether the excerpt of code is aiming to push or to pop >> the stack. >> It should be pushing, since the sp is the destination for the storing of >> all registers + link register... >> >> B rgds >> Kris >> >> >> -- >> To unsubscribe from this list: send an email with >> "unsubscribe kernelnewbies" to ecartis@xxxxxxxxxxxx >> Please read the FAQ at http://kernelnewbies.org/FAQ >> >> >> -- >> To unsubscribe from this list: send an email with >> "unsubscribe kernelnewbies" to ecartis@xxxxxxxxxxxx >> Please read the FAQ at http://kernelnewbies.org/FAQ >> >> > -- To unsubscribe from this list: send an email with "unsubscribe kernelnewbies" to ecartis@xxxxxxxxxxxx Please read the FAQ at http://kernelnewbies.org/FAQ
