On Feb 6, 2008 7:54 PM, Peter Teoh <htmldeveloper@xxxxxxxxx> wrote:
below function is used to handle tlb entires of global pages as they do not get flushed from TLB on task switch or writing to cr3
yes thats right !! its used to invalidate particular PTE entry in TLB.
I found one header file for x86 that implement the TLB flushing -
include/asm-x86/tlbflush.h (the different implementation are used are
used because of the diff generation of x86:
static inline void __native_flush_tlb(void)
{
write_cr3(read_cr3());
}
(my questions: WHAT IS THE DIFF BETWEEN FLUSH VIA flush_tlb() above
vs flush_tlb_global() below?)
below function is used to handle tlb entires of global pages as they do not get flushed from TLB on task switch or writing to cr3
static inline void __native_flush_tlb_global(void)
{
unsigned long cr4 = read_cr4();
/* clear PGE */
write_cr4(cr4 & ~X86_CR4_PGE);
/* write old PGE again and flush TLBs */
write_cr4(cr4);
}
(question: what is this single - does it flush only ONE SINGLE ENTRY
IN THE TLB that map this particular addr value?)
yes thats right !! its used to invalidate particular PTE entry in TLB.
static inline void __native_flush_tlb_single(unsigned long addr)
{
__asm__ __volatile__("invlpg (%0)" ::"r" (addr) : "memory");
}
--
---------------------------
Thanks & Regards,
Mahaveer Darade
mah.darade@xxxxxxxxx
Mobile - 9970365267
--- Dream it , Code it.
---The "silly question" is the first intimation of some totally new development
