-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1 On Thu, Mar 22, 2007 at 12:33:38PM +0200, Tzahi Fadida wrote: > I am trying to understand PCI unsuccessfully. > Let's say i have 4 GB of RAM and x86 32bit. > Now, i have 1 PCI card with a device on it. It has 4gb worth of registers. > I.e. memory. So, it sits on bus:0, device:1 function:2. > > 1) If i wish to address just two words (to be set to 0xffee) (32 bits) > register on address 0xe0000000. What will be the hardware steps to take? > My guess work (and please CMIIW): The address bus register on the cpu is set > to 0xe0000000, the CPU data bus is switched to PCI bus 0 and somewhere on the > bus 0 controller we set a register to 0x110 to represent device:1 function:2. > The CPU then writes to it's data bus 0xffee and we are done. The CPU doesn't know about bus, device, and functions. All the CPU knows that it has to write someting physical address 0xe0000000. Prior to that, the kernel PCI subsystem will have to configure the PCI device in such a way that that its memory window is mapped at 0xe0000000. > Also, i would appreciate to have the actual commands in linux to do the above. See Documentation/IO-mapping.txt, Documentation/pci.txt, LDD3 and other driver sources. > 2) The PCI device now wants it's memory to be i/o memory mapped to ram > (probably at boottime) so i can write *my_memmaped_pointer=0xffee; What are > the steps to do that in linux? No, you can't do that. It usually works on x86 but will fail on most other architectures. You should use writeb(), memcpy_toio() and friends. Again, See Documentation/IO-mapping.txt. > Btw, i am in serious doubt that there are devices on a PC x86 that allows a > PCI to directly connect it's data bus and address bus to the RAM address and > data bus like handheld computers does etc... instead of working like a port > on ISA (i.e. a separate bus). The PCI bus isn't connected directly to the CPU bus. There's always a PCI host bridge (north bridge) that sits between the CPU and the actual PCI bus. If you look at the hardware level, you will even see that on the physical PCI bus the address and data lines are shared. If the CPU does a write to an address on the PCI bus, the bus will first put the address on the lines, and after that it will put the value(s) on the bus. Erik - -- They're all fools. Don't worry. Darwin may be slow, but he'll eventually get them. -- Matthew Lammers in alt.sysadmin.recovery -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.6 (GNU/Linux) iD8DBQFGAoEm/PlVHJtIto0RAtE+AJ4+oMwiD3SpyAbv+ffj/siRsszLywCfTtPe 1kT31DIrnaPCjzsIaUTWHco= =EWys -----END PGP SIGNATURE----- -- To unsubscribe from this list: send an email with "unsubscribe kernelnewbies" to ecartis@xxxxxxxxxxxx Please read the FAQ at http://kernelnewbies.org/FAQ
