Hi, First, i am more interested in X86 behavior... Moreover, the following is probably a BIG salad of wrong use/mix of terms so bear with me and correct me where needed. Generally, i big time did not understand this concept of memory mapping to hardware in PCI. I have been reading LDD3 but failed to understand some things. If i recall something from electronics, the ISA I/O worked like this: you executed a special I/O write assembly command to the CPU which just switched the writing from RAM data bus to the I/O data bus. I believe the 16 bits of the address bus was used for both cases. Now, as i understand, in linux, you can map a region of I/O ports (I/O address) to a memory region and the kernel just translates the pointer to memory somehow to a port. This is done in software or in hardware i don't know, perhaps with something called IOMMU (so tell me :) ). Now, for PCI: It naturally have some kind of separate xx-bits data bus to write the data but it probably also shares the address bus with the memory bus in the wires of the CPU. However, differently from ISA the address bus is more weird in that you can add another redirection to a specific device using the combination of domain/bus/device/function. Each of these you can address the complete 32/64 bits address space, though for memory mapping all the devices share the same address space (otherwise how a mere pointer will know where to go). Again, somehow mapped using probably something called IOMMU. Does it behave exactly like ISA when writing either to ports or to mapped memory regions? with the exception that it's I/O address region starts just after the end of the ISA region(don't know where)? or from the bus/device/function combo it knows how to avoid that somehow? Do i need to explicitly map the ports to a memory region or the kernel somehow knows to do that for me (from the values written in the PCI peripheral registers). I.e. if i just *mem_reg_pointer = 1; will cause the kernel by hardware or software to redirect this write to PCI I/O ports? In these functions like: int pci_bus_read_config_byte (struct pci_bus *bus, unsigned int devfn, int where, u8 *val); The devfn means both the device 5 bits and the 3 function bits? CMIIW... -- Regards, Tzahi. -- Tzahi Fadida Blog: http://tzahi.blogsite.org | Home Site: http://tzahi.webhop.info WARNING TO SPAMMERS: see at http://members.lycos.co.uk/my2nis/spamwarning.html -- Regards, Tzahi. -- Tzahi Fadida Blog: http://tzahi.blogsite.org | Home Site: http://tzahi.webhop.info WARNING TO SPAMMERS: see at http://members.lycos.co.uk/my2nis/spamwarning.html -- To unsubscribe from this list: send an email with "unsubscribe kernelnewbies" to ecartis@xxxxxxxxxxxx Please read the FAQ at http://kernelnewbies.org/FAQ
