On 8/7/06, Chandrashekar MC <mc.chandrashekar@xxxxxxxxx> wrote:
This is a basic question, As we know CPU sets the DMA registers and give the control of RAM to DMA for datatransfer. When DMA is transferring data between RAM and Device, CPU can not access RAM. Without access to RAM(which has executalble code), how can CPU do any useful work during DMA datatransfer? I have a second question, Is it that only devices connected to ISA buses can use DMA? Regards, Chandra
Chandra, DMA has been around for 20+ years. The details really have been worked out pretty well by now. Things that alleviate bus collisions include: Interleaved memory. ie. If you have 2 memory sticks in your box, many motherboards alternate which stick is in use, even words in one, odd words in the other. That way the CPU can be accessing one and the DMA the other, then hopefully they switch on the next memory access. High-end systems (typically non-Intel) can have 4 and 8 way interleave specifically to allow multiple simultaneous data transfers. Cache's 1'st and 2nd levels (and IIRC even 3rd level in some high-end machines). This gets very important when you have multiple CPUs, because then you have even more contention. So a 16-cpu machine is much more likely to have large caches and a 3rd level. Dual Port memory: Allows 2 simultaneous accesses via the 2-ports. This kind of memory is expensive and typically reserved for Video cards, but it allows the cpu to update the video memory while the video is being driven out of the backside of the video memory. As to other busses supporting DMA, I'm sure any modern motherboard based bus is going to support DMA. Definately PCI does. HTH Greg -- Greg Freemyer The Norcross Group Forensics for the 21st Century -- Kernelnewbies: Help each other learn about the Linux kernel. Archive: http://mail.nl.linux.org/kernelnewbies/ FAQ: http://kernelnewbies.org/faq/
