On 6/27/06, Arjan van de Ven <arjan@xxxxxxxxxxxxx> wrote:
On Tue, 2006-06-27 at 12:52 -0600, Jim Cromie wrote: > its been mentioned repeatedly on LKML, > where they all know, and dont need it spelled out. > > Assuming I understand the answer, Ill add it to glossary. > > -- message signaled interrupts think of it like PCI interrupts but then using a special 32 bit number and not a number between 0 and 255. These also use the normal pci data lanes not some magic all over the chipset; which means that a device can basically have as many interrupts as it wants rather than 4 (1 in practice) for legacy PCI interrupts, and there are also no interrupt sharing issues, since there are just so many numbers for interrupts...
There are a few chipsets that support MSI, even though more and more are supporting it. Om. -- Kernelnewbies: Help each other learn about the Linux kernel. Archive: http://mail.nl.linux.org/kernelnewbies/ FAQ: http://kernelnewbies.org/faq/
