On 6/10/06, Ohad Ben-Cohen <ohadbc@xxxxxxxxx> wrote:
> At one place it was written about inline function > "it increases the code size which increases memory consumption and > instruction cache footprint" > > what is instruction cache footprint?? Can anyone please explain this to me. An instruction Cache keeps track of last accessed instructions, in order to save future memory accesses to them. memory accesses are expensive, they can take hundreds of clock cycles. On the other hand, cache accesses are fast. they can take from very few clock cycles to a few dozens, mainly depending on which cache it is (L1 or L2). anyway it is much more efficient than memory accesses. Caches are very limited in size. in general, if you have the very same instruction in several different addresses, you may end up with the cache holding it in several different blocks, which is a waste, because instead it could hold some other instruction.
and most importatly, you should understand that the processor cache is updated in lines of code, most often a dozen or more. suppose your processor icache line width is only 14 bytes, for each RAM access, a complete line has to be fetched from the memory to the cache before it starts executing the code and if the code jumps to some other point in memory, the above fetch operation needs to be performed again before continuing. thus, it seems more efficient as far as the cache is concerned to keep the code small so that most of our program code can remain in cache and without much memory fetches. inline functions repeats code, which makes our program lengthy, which means the processor might be required to update its cache more often. the condition is worse as far as the data cache is concerned where a write operation causes the cache line to be dirty which needs to be written back to memory. this becomes more of an issue when it comes to multi-processor systems where concurrent memory access is possible.
If you inline, you get to have the same instructions over and over in many different memory addresses. caches differentiate between instructions by their address, so as i said you may end up with this instruction(s) cached up too many times. I guess this is what the author meant. HTH, ohad.
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