cheng long wrote:
Please keep the list in CC...
On the PC then, you can for all intents and purposes just forget
that the CPU starts executing at 4G - 16 and pretend it starts at
1M - 16 as the 8086 did.
In "IA-32 Intel(r) Architecture Software Developer's Manual Volume
3:System Programming Guide", section 9.1.4, it says that the CPU do
start up from EPROM at address 0xFFFFFFF0.
It does. As explained though, on the PC (that machine incorperating as
one of its parts an 80x86 CPU) the double mapping and the immediate far
jump means that you can ignore that fact and pretend it starts at 1M -
16 instead without any downsides to your understanding of the concepts.
Section 9.7.1, paragraph 2, it says,"The actual interrupt- and
exception-handler code can be contained either in EPROM or
RAM;however, the code must be located within the 1-MByte addressable
range of the processor in real-address mode. If the handler code is
to be stored in RAM, it must be loaded along with the IDT."
Yes. Well, actually, some testing I once did showed that the HMA (see
previous message) is also good enough for interrupt handlers, meaning
that "1-MByte addressable range" should in fact read "that 1-MByte +
64-KByte - 16-Byte range". Don't know if there's a question in this
paragraph...
I also see in BIOS configuration a "System BIOS Cachable" iterm, is
it means load the handler code into RAM?
No, that option just means the L2 cache should also cache accesses in
the BIOS address range. As fas as I'm aware, the only reason you might
not want to do this is due to a flash BIOS changing out from under the
cache. Normally, you want to set it.
The option there that, if present at all, _is_ relevent to the issue is
"BIOS shadowing". Normally, the routing of 0x000F0000-0x000FFFF to the
BIOS chip means that the 64K of RAM at that address is inaccessible. If
the BIOS shadowing option is enabled, the BIOS (playing tricks with
read/write settings of the range) copies itself from the ROM BIOS chip
to that RAM and then disables the routing of 0x000F0000-0x000FFFFF to
the BIOS chip so that it just comes from RAM instead. This does not mean
you can now write to the region; the BIOS code that did the copying will
also have instructed the chipset to write-protect thw range, but what it
does mean is that accesses are much quicker.
On the PC, the BIOS (at poweron) is simply doubly mapped
How does it make this? a program, two addresses?
This is not a problem... all memory accesses pass through the chipset.
There is no physical reality about the BIOS chip being present at either
0x000F0000 or 0xFFF0000. It's just the chipset that "catches" accesses
in this range and enables the BIOS chip select line for them.
Another question, "System Programming Guide" showes that EPROM(BIOS)
switches to protected mode, is it true?
It probably just shows some possible BIOS code. The PC BIOS does in fact
switch to protected mode, if only for the memory test, but switches back
to real-mode again and the OS is loaded in real-mode.
Please be very aware that what you are reading is 80x86 documentation,
not PC documentation. The 80x86, be it a major one, is just one part of
a PC.
Rene.
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