Hi list, In one of my measurements I would like to disable both L1 and L2 cache of the processor, which is VIA Eden ESP 6000. According to its datasheet, I modified corresponding bits in the MSR, Machine Specified Register, in order to disable CPU caching, but failed. The machine reboots as soon as I write to the MSR! Then how can I disable the CPU caching? I am playing with Linux 2.6.10, applications are compiled with uClibc 3.3.5 Thank you in advanced for any hints or suggestions! with kind regards, Yang -- Kernelnewbies: Help each other learn about the Linux kernel. Archive: http://mail.nl.linux.org/kernelnewbies/ FAQ: http://kernelnewbies.org/faq/
