I run linux on an embedded MIPS little-endian CPU, but I'm getting
distressingly poor system clock performance. My CPU clock is supposed
to be good to about 30 PPM, but my system time is always slow to the
tune of 800 PPM!
I do a lot of PIO, so I wonder if it is possible that the PIO makes
the kernel lose timer interrupts? I notice that my timer is implemented
as a countdown: in arch/mips/kernel/time.c:timer_interrupt(), it says
this:
/*
* high-level timer interrupt service routines. This function
* is set as irqaction->handler and is invoked through do_IRQ.
*/
void timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
{
if (mips_cpu.options & MIPS_CPU_COUNTER) {
unsigned int count;
/*
* The cycle counter is only 32 bit which is good for about
* a minute at current count rates of upto 150MHz or so.
*/
count = read_32bit_cp0_register(CP0_COUNT);
timerhi += (count < timerlo); /* Wrap around */
timerlo = count;
/*
* set up for next timer interrupt - no harm if the machine
* is using another timer interrupt source.
* Note that writing to COMPARE register clears the interrupt
*/
write_32bit_cp0_register (CP0_COMPARE,
count + cycles_per_jiffy);
}
<snip>...
Does it make sense that the average latency to the
write_32bit_cp0_register() command would be .8ms?
I understand that I can use ntpd to correct this problem, but 800PPM
seems egreggiously bad to me. Any suggestions are welcome!
Dave
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