Quoting "Raghu R. Arur" <rra2002@aria.ncl.cs.columbia.edu>: > > So is there no way that i can account for tlb misses. For my purpose i > need to catch the tlb misses. Is there no way in x86 to catch the tlb > misses. Is there a documentation about the tlbs anywhere. I searched thru > intel documentation, but dint get any useful info. > > thanks a lot, > Raghu > I guess the performance monitoring events detailed in Intel Arch Manual 3 might be useful for this. sridhar -- Kernelnewbies: Help each other learn about the Linux kernel. Archive: http://mail.nl.linux.org/kernelnewbies/ FAQ: http://kernelnewbies.org/faq/
