bellucda@tiscali.it writes: Raghu R. Arur writes: > > when a tlb miss happens, will the access bit of pte entry of the > > page be affected?? > > ... no. Really?! I thought the whole reason it's making a translation is that the page is being accessed, so it would have to set the access bit if it wasn't already set. IA-32 Intel Architecture Software Developer's Manual, section 3.7.6. Maybe you say "no" because the accessed bit is set in the TLB entry, and only really set in the page table itself when the TLB entry is flushed to memory. -- --Ed L Cashin | PGP public key: ecashin@uga.edu | http://noserose.net/e/pgp/ -- Kernelnewbies: Help each other learn about the Linux kernel. Archive: http://mail.nl.linux.org/kernelnewbies/ FAQ: http://kernelnewbies.org/faq/
