From: Hua Ma <hua.ma@xxxxxxxxxxxxxxx> This patch adds binding documentation for the compatible values of the Intel MIPS SoCs. Signed-off-by: Hua Ma <hua.ma@xxxxxxxxxxxxxxx> Signed-off-by: Songjun Wu <songjun.wu@xxxxxxxxxxxxxxx> --- Changes in v2: - New patch split from previous patch - Add the board and chip compatible in dt document Documentation/devicetree/bindings/mips/intel.txt | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) create mode 100644 Documentation/devicetree/bindings/mips/intel.txt diff --git a/Documentation/devicetree/bindings/mips/intel.txt b/Documentation/devicetree/bindings/mips/intel.txt new file mode 100644 index 000000000000..ac594ef303b7 --- /dev/null +++ b/Documentation/devicetree/bindings/mips/intel.txt @@ -0,0 +1,17 @@ +Intel MIPS SoC device tree bindings + +1, SoCs + +Each device tree must specify a compatible value for the Intel SoC +it uses in the compatible property of the root node. The compatible +value must be one of the following values: + + intel,xrx500 + +2, Boards + +Each device tree must specify a compatible value for the Intel Board +it uses in the compatible property of the root node. The compatible +value must be one of the following values: + + intel,easy350-anywan -- 2.11.0
