On Fri, Jul 27, 2018 at 09:53:55PM +0200, Alexandre Belloni wrote: > +- compatible : "snps,dw-apb-ssi" or "mscc,<soc>-spi" > +- reg : The register base for the controller. For "mscc,<soc>-spi", a second > + register set is required (named ICPU_CFG:SPI_MST) What are valid values for "<soc>"? Please submit patches using subject lines reflecting the style for the subsystem. This makes it easier for people to identify relevant patches. Look at what existing commits in the area you're changing are doing and make sure your subject lines visually resemble what they're doing.
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