On Wed, Jul 11, 2018 at 01:46:31PM +0100, Maciej W. Rozycki wrote: > > Only loongson-3 is DMA coherent and uses swiotlb. So move the dma > > address translations stubs directly to the loongson-3 code, and remove > > a few Kconfig indirections. > > SiByte should too though, at least for those boards, such as the SWARM > and the BigSur, that can have DRAM over 4GiB (and 32-bit PCI devices > plugged). Only in this case refers to loonson boards. > I never got to have the wiring of swiotlb completed for these boards as > I got distracted with getting set up to debug a DRAM controller issue > observed in the form of memory data corruption with the banks fully > populated (which might have to do something with the parameters of bank > interleaving enabled in such a configuration, as replacing a single > module with a smaller-sized one and therefore disabling interleaving, > which can only work with all modules being the same size, makes the > problem go away). After this series enabling swiotlb for another board is trivial as all the code has been consolidated. Just select SWIOTLB and add a call to swiotlb_init to the board setup code. > > FWIW, > > Maciej ---end quoted text---
