With the fast DMA bit set, the DMA will transfer twice as much data per clock period to the AIC, so there is little point not to set it. Signed-off-by: Paul Cercueil <paul@xxxxxxxxxxxxxxx> --- drivers/dma/dma-jz4780.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/dma/dma-jz4780.c b/drivers/dma/dma-jz4780.c index 922e4031e70e..7ee2c121948f 100644 --- a/drivers/dma/dma-jz4780.c +++ b/drivers/dma/dma-jz4780.c @@ -52,6 +52,7 @@ #define JZ_DMA_DMAC_DMAE BIT(0) #define JZ_DMA_DMAC_AR BIT(2) #define JZ_DMA_DMAC_HLT BIT(3) +#define JZ_DMA_DMAC_FAIC BIT(27) #define JZ_DMA_DMAC_FMSC BIT(31) #define JZ_DMA_DRT_AUTO 0x8 @@ -929,8 +930,8 @@ static int jz4780_dma_probe(struct platform_device *pdev) * Also set the FMSC bit - it increases MSC performance, so it makes * little sense not to enable it. */ - jz4780_dma_ctrl_writel(jzdma, JZ_DMA_REG_DMAC, - JZ_DMA_DMAC_DMAE | JZ_DMA_DMAC_FMSC); + jz4780_dma_ctrl_writel(jzdma, JZ_DMA_REG_DMAC, JZ_DMA_DMAC_DMAE | + JZ_DMA_DMAC_FAIC | JZ_DMA_DMAC_FMSC); if (jzdma->version == ID_JZ4780) jz4780_dma_ctrl_writel(jzdma, JZ_DMA_REG_DMACP, 0); -- 2.18.0
