Hi James-san,
> I presume this patch is ready to apply now (thanks for the reviews
> folks).
I am very happy with this. Thank you so much for your reviewing.
> How far back does this need backporting to stable branches?
The patch is for maintenance purpose so better to apply stable branches.
> It applies easily back to 3.14 I think (commit 3c06b12b046e ("MIPS:
> BCM47XX: fix position of cpu_wait disabling")), but you mentioned other
> fixes too. Have those been backported too, and if not is there any point
> backporting this?
Yes the other fixes also are possible to be applied to stable branches.
The patches were reviewed as below and applied into the mtd/next branch.
<https://patchwork.ozlabs.org/project/linux-mtd/list/?series=47464&state=*>
<http://git.infradead.org/linux-mtd.git/shortlog/refs/heads/mtd/next>
The patches 1/1 to 4/5 are tagged Cc: stable to apply into stable branches.
But actually those have not been applied yet into stable branches I think.
Regards,
Ikegami
> -----Original Message-----
> From: James Hogan [mailto:jhogan@xxxxxxxxxx]
> Sent: Wednesday, June 06, 2018 12:46 AM
> To: IKEGAMI Tokunori
> Cc: PACKHAM Chris; Rafał Miłecki; linux-mips@xxxxxxxxxxxxxx
> Subject: Re: [PATCH v5 1/1] MIPS: BCM47XX: Enable MIPS32 74K Core
> ExternalSync for BCM47XX PCIe erratum
>
> On Sun, Jun 03, 2018 at 11:02:01PM +0900, Tokunori Ikegami wrote:
> > The erratum and workaround are described by BCM5300X-ES300-RDS.pdf as
> below.
> >
> > R10: PCIe Transactions Periodically Fail
> >
> > Description: The BCM5300X PCIe does not maintain transaction
> ordering.
> > This may cause PCIe transaction failure.
> > Fix Comment: Add a dummy PCIe configuration read after a PCIe
> > configuration write to ensure PCIe configuration
> access
> > ordering. Set ES bit of CP0 configu7 register to enable
> > sync function so that the sync instruction is
> functional.
> > Resolution: hndpci.c: extpci_write_config()
> > hndmips.c: si_mips_init()
> > mipsinc.h CONF7_ES
> >
> > This is fixed by the CFE MIPS bcmsi chipset driver also for BCM47XX.
> > Also the dummy PCIe configuration read is already implemented in the Linux
> > BCMA driver.
> > Enable ExternalSync in Config7 when CONFIG_BCMA_DRIVER_PCI_HOSTMODE=y
> > too so that the sync instruction is externalised.
> >
> > Signed-off-by: Tokunori Ikegami <ikegami@xxxxxxxxxxxxxxxxxxxx>
> > Reviewed-by: Paul Burton <paul.burton@xxxxxxxx>
> > Acked-by: Hauke Mehrtens <hauke@xxxxxxxxxx>
> > Cc: Chris Packham <chris.packham@xxxxxxxxxxxxxxxxxxx>
> > Cc: Rafał Miłecki <zajec5@xxxxxxxxx>
> > Cc: linux-mips@xxxxxxxxxxxxxx
>
> I presume this patch is ready to apply now (thanks for the reviews
> folks).
>
> How far back does this need backporting to stable branches?
>
> It applies easily back to 3.14 I think (commit 3c06b12b046e ("MIPS:
> BCM47XX: fix position of cpu_wait disabling")), but you mentioned other
> fixes too. Have those been backported too, and if not is there any point
> backporting this?
>
> Thanks
> James
