RE: [PATCH v2 0/1] MIPS: BCM47XX: Apply BCM5300X PCIe erratum workaround

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Hi,

Sorry a changelog has not been described by the v2 patch so let me send mail about this.
There is no change from the v1 patch that was resent to fix the review comments for the original v1 patch.
  Note: The v1 patch was changed below for the review comments.
        - Use set_c0_config7 instead of write_c0_config7.

Regards,
Ikegami

> -----Original Message-----
> From: Tokunori Ikegami [mailto:ikegami@xxxxxxxxxxxxxxxxxxxx]
> Sent: Monday, May 28, 2018 9:25 AM
> To: James Hogan
> Cc: IKEGAMI Tokunori; PACKHAM Chris; Hauke Mehrtens; Rafa~B Mi~Becki;
> linux-mips@xxxxxxxxxxxxxx
> Subject: [PATCH v2 0/1] MIPS: BCM47XX: Apply BCM5300X PCIe erratum
> workaround
> 
> The workaround is to eanble ExternalSync mode and it is implemented on CFE.
> But to enable this without CFE implemented it add the workaround into Linux.
> 
> Signed-off-by: Tokunori Ikegami <ikegami@xxxxxxxxxxxxxxxxxxxx>
> Cc: Chris Packham <chris.packham@xxxxxxxxxxxxxxxxxxx>
> Cc: Hauke Mehrtens <hauke@xxxxxxxxxx>
> Cc: Rafa~B Mi~Becki <zajec5@xxxxxxxxx>
> Cc: linux-mips@xxxxxxxxxxxxxx
> 
> Tokunori Ikegami (1):
>   MIPS: BCM47XX: Enable MIPS32 74K Core ExternalSync for BCM47XX PCIe
>     erratum
> 
>  arch/mips/include/asm/mipsregs.h |  3 +++
>  arch/mips/kernel/cpu-probe.c     | 12 +++++++++++-
>  2 files changed, 14 insertions(+), 1 deletion(-)
> 
> --
> 2.16.1





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