Re: [PATCH v6 1/8] MIPS: Loongson: Merge PRID macro for Loongson-1A/1B/1C

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Hi, Sergei,

I think this modification is appropriate, otherwise if the future 
support 1D, 1E and so on, the same PRID here will appear strange.

Yang

On Thu, Mar 30, 2017 at 12:50:55PM +0300, Sergei Shtylyov wrote:
> Hello!
> 
> On 3/30/2017 5:44 AM, Binbin Zhou wrote:
> 
> >As we all know, the Loongson-1 series CPUs(1A/1B/1C) share the same PRID macro.
> >so I rename them for more readable.
> 
>    "Better readability", perhaps?
> 
> >Signed-off-by: Binbin Zhou <zhoubb@xxxxxxxxxx>
> >Signed-off-by: HuaCai Chen <chenhc@xxxxxxxxxx>
> [...]
> 
> MBR, Sergei
> 




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