On 12/12/2016 12:45 PM, Leonid Yegoshin wrote: > On 12/12/2016 10:24 AM, Florian Fainelli wrote: >> >> What Justin's patch is about is not so much about providing hints to >> user-space to bypass the kernel's own management of caches, (even though >> that has been used as an argument by the original introduction of >> cacheinfo), but more to provide some information to user-space about the >> cache topology and hierarchy. > > I missed that, if it is for information purpose only, then it is OK. > >> >> Even though this is limited information this is still helpful to >> applications like lshw and others out there. >> >> What would be needed from your perspective to get cacheinfo added to >> MIPS, shall we go back and address your initial comment about all the >> little details about coherency, snooping and re-filling strategy? > > It depends. Initially, I thought Justin wants to replace > arch/mips/mm/c-XXX.c with some universal approach and listed the missed > stuff for that (I actually missed some more points in that list). > > But for information purpose I don't have any more addition to Justin's > patch... may be the coherency status, it has impact on performance: > coherency of L1D->L2, L2->memory and L1I->L1D/L2. OK, how would you want that to be represented? Should we try to "link" with the leaf we are coherent with? For instance, if the L1D cache is coherent with the L2, we have something like this: # Assuming this is L1D cache: /sys/devices/system/cpu/cpu0/cache/index0 ls -1 coherency_line_size level number_of_sets physical_line_partition power/ shared_cpu_list shared_cpu_map size type uevent ways_of_associativity We add a new symbolic link, e.g: coherent_with -> ../index1 that indicates that this cache is coherent with the cache pointed at by directory index1. Thanks! -- Florian
