The hardware documentation says bit 11:10 are used for the GPE frequency selection. Fix the mask in the define to match these bits. Reported-by: Dan Carpenter <dan.carpenter@xxxxxxxxxx> Cc: Thomas Langer <thomas.langer@xxxxxxxxx> Signed-off-by: Hauke Mehrtens <hauke@xxxxxxxxxx> --- arch/mips/lantiq/falcon/sysctrl.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/mips/lantiq/falcon/sysctrl.c b/arch/mips/lantiq/falcon/sysctrl.c index 2a1b302..82bbd0e 100644 --- a/arch/mips/lantiq/falcon/sysctrl.c +++ b/arch/mips/lantiq/falcon/sysctrl.c @@ -24,7 +24,7 @@ /* GPE frequency selection */ #define GPPC_OFFSET 24 -#define GPEFREQ_MASK 0x00000C0 +#define GPEFREQ_MASK 0x0000C00 #define GPEFREQ_OFFSET 10 /* Clock status register */ #define SYSCTL_CLKS 0x0000 -- 2.10.2
