Re: [PATCH 1/2] MIPS: c-r4k: Sync icache when it fills from dcache

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

 



On 01/22/2016 07:19, James Hogan wrote:
> On Fri, Jan 22, 2016 at 01:06:14PM +0100, Manuel Lauss wrote:
>> Hi James,
[snip]
> 
> Thanks Manuel.
> 
> FWIW, attached is the test program I mentioned, which hits the first
> part of this patch (flush_cache_range) via mprotect(2) and checks if
> icache seems to have been flushed (tested on mips64r6, but should be
> portable).

Here's the output on my Octane, R14000 CPU (mips4):

# ./mprotect
Initial mprotect SUCCESS
Looped { mprotect RW, modify, mprotect RX, test } SUCCESS

This is without your patch applied.  That look good?  I'm assuming this CPU is
too old to be affected.  I can test with your patch after the blizzard is over
later this weekend.

-- 
Joshua Kinard
Gentoo/MIPS
kumba@xxxxxxxxxx
6144R/F5C6C943 2015-04-27
177C 1972 1FB8 F254 BAD0 3E72 5C63 F4E3 F5C6 C943

"The past tempts us, the present confuses us, the future frightens us.  And our
lives slip away, moment by moment, lost in that vast, terrible in-between."

--Emperor Turhan, Centauri Republic




[Index of Archives]     [Linux MIPS Home]     [LKML Archive]     [Linux ARM Kernel]     [Linux ARM]     [Linux]     [Git]     [Yosemite News]     [Linux SCSI]     [Linux Hams]

  Powered by Linux