[PATCH please merge into original 01/15] MIPS: lantiq: add locking for PMU register and check status afterwards

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

 



From: Hauke Mehrtens <hauke.mehrtens@xxxxxxxxxx>

The PMU register are accessed in a non atomic way and they could be
accessed by different threads simultaneously, which could cause
problems, this patch adds locking around the PMU registers. In
addition this patch makes the function deactivating the PMU register
wait till this setting is applied.

Signed-off-by: Hauke Mehrtens <hauke.mehrtens@xxxxxxxxxx>
---
 arch/mips/lantiq/xway/sysctrl.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/mips/lantiq/xway/sysctrl.c b/arch/mips/lantiq/xway/sysctrl.c
index c73ea3f..7c2ddbd 100644
--- a/arch/mips/lantiq/xway/sysctrl.c
+++ b/arch/mips/lantiq/xway/sysctrl.c
@@ -4,6 +4,8 @@
  *  by the Free Software Foundation.
  *
  *  Copyright (C) 2011-2012 John Crispin <blogic@xxxxxxxxxxx>
+ *  Copyright (C) 2013 Lei Chuanhua <Chuanhua.lei@xxxxxxxxxx>
+ *  Copyright (C) 2015 Hauke Mehrtens <hauke.mehrtens@xxxxxxxxxx>
  */
 
 #include <linux/ioport.h>
-- 
2.6.1





[Index of Archives]     [Linux MIPS Home]     [LKML Archive]     [Linux ARM Kernel]     [Linux ARM]     [Linux]     [Git]     [Yosemite News]     [Linux SCSI]     [Linux Hams]

  Powered by Linux