Re: [PATCH 01/15] MIPS: lantiq: add locking for PMU register and check status afterwards

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Hello.

On 10/29/2015 1:37 AM, Hauke Mehrtens wrote:

From: Hauke Mehrtens <hauke.mehrtens@xxxxxxxxxx>

From: Hauke Mehrtens <hauke.mehrtens@xxxxxxxxxx>

   Hm... why twice?

The PMU register are accesses in a non atomic way and they could be

   Accessed?

accesses by different threads simultaneously, which could cause

   Accessed?

problems this patch adds locking around the PMU registers. In
addition it is now also waited till the PMU is actually deactivated.

   Perhaps "we now also wait"?

Signed-off-by: Hauke Mehrtens <hauke.mehrtens@xxxxxxxxxx>

[...]

MBR, Sergei





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