This series implements some fixes for the CPS SMP implementation on some
systems, and improves debug by allowing exceptions to be handled &
dumped to an ns16550-compatible UART.
Paul Burton (10):
MIPS: CPS: set Status.BEV bit during early boot
MIPS: CPS: set Status.KX on entry for MIPS64 kernels
MIPS: CPS: early debug using an ns16550-compatible UART
MIPS: CPS: read CM GCR base from cop0
MIPS: CPS: skip Config1 presence check
MIPS: CPS: warn if a core doesn't start
MIPS: CM: fix GCR_Cx_CONFIG PVPE mask
MIPS: CM: introduce core-other locking functions
MIPS: CM: make use of mips_cm_{lock,unlock}_other
MIPS: CM,CPC: ensure core-other GCRs reflect the correct core
arch/mips/Kconfig.debug | 26 +++++
arch/mips/include/asm/mips-cm.h | 34 ++++++-
arch/mips/include/asm/mips-cpc.h | 3 +-
arch/mips/include/asm/mipsregs.h | 3 +
arch/mips/kernel/Makefile | 1 +
arch/mips/kernel/cps-vec-ns16550.S | 202 +++++++++++++++++++++++++++++++++++++
arch/mips/kernel/cps-vec.S | 44 ++++++--
arch/mips/kernel/mips-cm.c | 45 +++++++++
arch/mips/kernel/mips-cpc.c | 6 ++
arch/mips/kernel/smp-cps.c | 35 ++++++-
arch/mips/kernel/smp-gic.c | 2 +
11 files changed, 386 insertions(+), 15 deletions(-)
create mode 100644 arch/mips/kernel/cps-vec-ns16550.S
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2.5.3
