Patch 1/6 to 5/6 are pll calculation fixes for clock settings. Patch 6/6: Is a reword and repost based on earlier thread: http://patchwork.linux-mips.org/patch/10108/ Series Based on 4.2-rc5 Tested with Pistachio Bring-up-Board. Damien.Horsley (1): clk: pistachio: correct critical clock list Zdenko Pulitika (5): clk: pistachio: Fix 32bit integer overflows clk: pistachio: Fix override of clk-pll settings from boot loader clk: pistachio: Fix pll rate calculation in integer mode clk: pistachio: Set operating mode in .set_rate pistachio: pll: Fix vco calculation in .set_rate (fractional) drivers/clk/pistachio/clk-pistachio.c | 19 ++++++--- drivers/clk/pistachio/clk-pll.c | 75 ++++++++++++++++++++++++++--------- drivers/clk/pistachio/clk.h | 18 +++++---- 3 files changed, 82 insertions(+), 30 deletions(-) -- 1.9.1