Re: [PATCH v2 03/10] MIPS: mipsregs.h: Add EntryLo bit definitions

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On Tue, 19 May 2015, James Hogan wrote:

> Add definitions for EntryLo register bits in mipsregs.h. The R4000
> compatible ones are prefixed MIPS_ENTRYLO_ and the R3000 compatible ones
> are prefixed R3K_ENTRYLO_.

 I think the convention for macros in <asm/mipsregs.h> has been to omit 
the MIPS_ prefix for generic definitions.  The prefix is meant for MIPS32 
and MIPS64 architecture processor properties.  The bits in EntryLo0/1 have 
been like this since forever, with the exception of the R3k/R6k/R8k 
oddballs.  So I think they can be treated as generic.  Of course the R3K_ 
prefix is right with R3k-specific definitions.

 OTOH, the EntryHi.EHINV bit has only been added with (non-legacy) MIPS 
architecture processors, so MIPS_ENTRYHI_EHINV is the right choice 
(although its placement is unfortunate, buried within the "Bits in the 
MIPS32/64 PRA coprocessor 0 config registers 1 and above." section).

> diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h
> index 764e2756b54d..3b5a145af659 100644
> --- a/arch/mips/include/asm/mipsregs.h
> +++ b/arch/mips/include/asm/mipsregs.h
> @@ -589,6 +589,28 @@
>  /*  EntryHI bit definition */
>  #define MIPS_ENTRYHI_EHINV	(_ULCAST_(1) << 10)
>  
> +/* R3000 EntryLo bit definitions */
> +#define R3K_ENTRYLO_G		(_ULCAST_(1) << 8)
> +#define R3K_ENTRYLO_V		(_ULCAST_(1) << 9)
> +#define R3K_ENTRYLO_D		(_ULCAST_(1) << 10)
> +#define R3K_ENTRYLO_N		(_ULCAST_(1) << 11)
> +
> +/* R4000 compatible EntryLo bit definitions */
> +#define MIPS_ENTRYLO_G		(_ULCAST_(1) << 0)
> +#define MIPS_ENTRYLO_V		(_ULCAST_(1) << 1)
> +#define MIPS_ENTRYLO_D		(_ULCAST_(1) << 2)
> +#define MIPS_ENTRYLO_C_SHIFT	3
> +#define MIPS_ENTRYLO_C		(_ULCAST_(7) << MIPS_ENTRYLO_C_SHIFT)

 Please drop the MIPS_ prefix here then, e.g.:

#define ENTRYLO_G		(_ULCAST_(1) << 0)

> +#ifdef CONFIG_64BIT
> +/* as read by dmfc0 */
> +#define MIPS_ENTRYLO_XI		(_ULCAST_(1) << 62)
> +#define MIPS_ENTRYLO_RI		(_ULCAST_(1) << 63)
> +#else
> +/* as read by mfc0 */
> +#define MIPS_ENTRYLO_XI		(_ULCAST_(1) << 30)
> +#define MIPS_ENTRYLO_RI		(_ULCAST_(1) << 31)
> +#endif
> +

 These do need to keep the prefix however, because these have only been 
added with MIPS32/MIPS64 processors.  This also means they need its own 
explanatory heading.

 And then put the generic (or R4k) bits first, followed by the R3k bits, 
followed by the MIPS32/64 bits.  See how it's been done for the Status 
register (disregard the odd ST0_ prefix, it's another legacy) and the 
Config register.

 Like with MIPS_ENTRYHI_EHINV I think the placement of these new additions 
is also unfortunate.  No need for you to fix the former, unless you're 
keen to, but with this new stuff I suggest that you put it right at the 
top, to keep the definitions grouped by the function (MMU in this case) 
and roughly in the numeric order by register ID.  So that'll be 
immediately before stuff for PageMask.

 Thanks for your patience and sorry to be a pain, but this file has had a 
tendency to become a mess.  Maybe we need to put a note explaining the 
rules at the top.

  Maciej





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