Re: [v5] MIPS: lib: csum_partial: more instruction paral

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

 



On Mon, 6 Apr 2015, cee1 wrote:

> >  I'm not sure if any such other superscalar MIPS pipeline implementation
> > exists, but if written correctly then at worst it won't hurt anyone else,
> > so just make sure your change does not regress scalar MIPS pipelines.  I
> > hope you have a way to verify it.
> 
> It seems the P-Class of Warrior generation of MIPS CPU has a
> superscalar MIPS pipeline(http://imgtec.com/mips/warrior/pclass.asp).

 There have been many superscalar MIPS implementations, however I don't
know offhand if any other have the restrictions like yours.

  Maciej





[Index of Archives]     [Linux MIPS Home]     [LKML Archive]     [Linux ARM Kernel]     [Linux ARM]     [Linux]     [Git]     [Yosemite News]     [Linux SCSI]     [Linux Hams]

  Powered by Linux