From: "Steven J. Hill" <Steven.Hill@xxxxxxxxxx> This set of patches adds XPA support for R5 and later cores. This has been tested on P5600 platforms only. As noted in the main commit for XPA support, EVA and XPA cannot currently be used at the same time. Changes from V2: - Moved HIGHMEM and cache flush fixes to separate patchset. - Rebased against 3.19-rc5 tag. Changes from V1: - Remove fixrange_init() revert patch. - Remove CCA patch. - Remove HEAP/BSS execute bit removal patch. - Updated __writex_32bit_c0_register() to use %1 instead of the macro variable name. Steven J. Hill (5): MIPS: Usage and cosmetic cleanups of page table bits. MIPS: Rearrange PTE bits into fixed positions. MIPS: Add set/clear CP0 macros for PageGrain register MIPS: Add support for XPA. MIPS: XPA: Add new configuration file. arch/mips/Kconfig | 35 +++ arch/mips/configs/maltaup_xpa_defconfig | 440 +++++++++++++++++++++++++++++++ arch/mips/include/asm/cpu-features.h | 3 + arch/mips/include/asm/cpu.h | 1 + arch/mips/include/asm/mipsregs.h | 1 + arch/mips/include/asm/pgtable-32.h | 23 +- arch/mips/include/asm/pgtable-bits.h | 180 +++++++------ arch/mips/include/asm/pgtable.h | 40 ++- arch/mips/kernel/cpu-probe.c | 6 +- arch/mips/kernel/proc.c | 1 + arch/mips/mm/init.c | 7 +- arch/mips/mm/tlb-r4k.c | 18 +- arch/mips/mm/tlbex.c | 88 ++++++- 13 files changed, 705 insertions(+), 138 deletions(-) create mode 100644 arch/mips/configs/maltaup_xpa_defconfig -- 1.7.10.4
