When requesting the performance counter overflow interrupt, pass flags which are compatible with the cevt-r4k driver, in particular IRQF_SHARED so that the two handlers can share the same IRQ. This is possible since release 2 of the architecture where there are separate pending interrupt bits for the timer interrupt and the performance counter interrupt. This will be necessary since the FDC interrupt can also be arbitrarily routed to a CPU interrupt, possibly sharing with the timer, the performance counters, or both, and it isn't scalable to have all the handlers able to call other handlers that may be on the same IRQ line. Signed-off-by: James Hogan <james.hogan@xxxxxxxxxx> Cc: Ralf Baechle <ralf@xxxxxxxxxxxxxx> Cc: Robert Richter <rric@xxxxxxxxxx> Cc: linux-mips@xxxxxxxxxxxxxx Cc: oprofile-list@xxxxxxxxxxxx --- arch/mips/oprofile/op_model_mipsxx.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/arch/mips/oprofile/op_model_mipsxx.c b/arch/mips/oprofile/op_model_mipsxx.c index 24729f023d93..d6b9e69e7c69 100644 --- a/arch/mips/oprofile/op_model_mipsxx.c +++ b/arch/mips/oprofile/op_model_mipsxx.c @@ -442,7 +442,10 @@ static int __init mipsxx_init(void) if (perfcount_irq >= 0) return request_irq(perfcount_irq, mipsxx_perfcount_int, - 0, "Perfcounter", save_perf_irq); + IRQF_PERCPU | IRQF_NOBALANCING | + IRQF_NO_THREAD | IRQF_NO_SUSPEND | + IRQF_SHARED, + "Perfcounter", save_perf_irq); return 0; } -- 2.0.5
